1. Field of the Invention
The present invention relates to a semiconductor integrated circuit used for a multi-chip package and a multi-chip package including a plurality of semiconductor integrated circuits.
2. Description of Related Art
FIG. 12 is a diagram showing a configuration of semiconductor integrated circuits used for a conventional multi-chip package. In this figure, the reference numeral 1 designates a multi-chip package (called xe2x80x9cMCPxe2x80x9d from now on) for packaging a plurality of chips; and reference numerals 2a and 2b each designate a chip (semiconductor integrated circuit).
In the MCP 1, each reference numeral 3 designates an MCP external terminal.
In the chips 2a and 2b, each reference numeral 4 designates a pad, 5 designates an external output driver for outputting an internal signal to the outside of the MCP 1; 6 designates an internal input driver for inputting a signal from another chip within the MCP 1; 7 designates an internal output driver for outputting an internal signal to another chip within the MCP 1; reference numerals 8a and 8b each designate a module; and each reference numeral 9 designates a wire for connecting one of the MCP external terminals 3 with one of the pads 4.
FIG. 13 is a block diagram showing a configuration for an individual wafer test of a conventional chip. In this figure, the reference numeral 2a designates a chip and 11 designates a tester.
In the chip 2a, the reference numeral 5 designates an external output driver and 7 designates an internal output driver, which correspond to the components designated by the same reference numerals in FIG. 12. In the tester 11, the reference numeral 12 designates a comparator. Reference numerals 13a and 13b each designate a load capacitance of the tester 11.
In FIG. 12, each couple of the pad 4 and external output driver 5 constitutes an external output terminal, each couple of the pad 4 and internal input driver 6 constitutes an internal input terminal, and each couple of the pad 4 and internal output driver 7 constitutes an internal output terminal. In addition, although not shown in FIG. 12, there is an external input/output driver for inputting a signal from the outside of the MCP 1 and for outputting an internal signal to the outside of the MCP 1. A couple of the pad and external input/output driver constitutes an external input/output terminal. Furthermore, there is an internal input/output driver for inputting a signal from another chip within the MCP 1 and for outputting an internal signal to another chip within the MCP 1. A couple of the pad and internal input/output driver constitutes an internal input/output terminal.
Next, the operation of the conventional device will be described.
The input/output terminals and output terminals of the chips 2a and 2b in the conventional MCP 1 have considerable sizes, and are divided into two types: terminals used as an external input/output terminals or external output terminals after packaging; and terminals used as an internal input/output terminals and internal output terminals after packaging.
As for the internal input/output terminals and internal output terminals, their drivers can be made smaller than the drivers of the external input/output terminals and external output terminals considering the usage after packaging.
However, for the individual wafer test as shown in FIG. 13 which is carried out before packaging, it is necessary for the drivers of the external input/output terminals and external output terminals and the drivers of the internal input/output terminals and internal output terminals to have a size needed for driving the load capacitances 13a and 13b of the tester 11, which are connected only during the test.
Therefore, although the size of the drivers of the internal input/output terminals and internal output terminals may be smaller than that of the drivers of the external input/output terminals and external output terminals after packaging, they must have about the same size for the individual wafer test before packaging.
With the foregoing configuration, the conventional semiconductor integrated circuit has a problem in that it is inevitable to increase the driver size of the internal input/output terminals and internal output terminals to drive the load capacitances 13a and 13b of the tester 11 before packaging. In addition, the improper driver size after packaging offers a problem of causing noise or increasing power consumption.
The present invention is implemented to solve the foregoing problems. It is therefore an object of the present invention to provide a semiconductor integrated circuit and multi-chip package capable of preventing noise and power consumption from being increased by optimizing the drive capacity after packaging.
According to a first aspect of the present invention, there is provided a semiconductor integrated circuit including driving power variably setting means for variably setting driving power of a driver in an internal input/output terminal or an internal output terminal, which is used for exchanging a signal with another semiconductor integrated circuit in the multi-chip package. It offers an advantage of being able to optimize the driving power after packaging, thereby suppressing the noise and power consumption.
According to a second aspect of the present invention, there is provided a multi-chip package including driving power variably setting means for variably setting driving power of a driver in an internal input/output terminal or an internal output terminal, which is used for exchanging a signal with another semiconductor integrated circuit in the multi-chip package, a driving power control pad for transferring a control signal to the driving power variably setting means; and an external terminal for transferring the input control signal to the driving power control pad. It offers an advantage of being able to optimize the driving power after packaging by supplying the control signal via the external terminal.